FeRAM Publications

TITLE:

“Low temperature preparation of ferroelectric bismuth titanate thin films”, Kan-Hao Xue, Jolanta Celinska, and Carlos Paz De Araujo, Applied Physics Letters, 95, n 5, (2009)

ABSTRACT:

The low temperature metal organic decomposition techniques of ferroelectric bismuth titanate (BIT) thin films were investigated. BIT was found to be crystallized by rapid thermal processing at 450 °C . The stoichiometric Bi4Ti3O12 sample exhibited (117) orientation, while the Bi4.8Ti3O13.2 sample, with 20% excess bismuth, possessed a/b axes orientation with (117) component. Pt/Bi4.8Ti3O13.2/Pt ferroelectric capacitors were fabricated with temperature confined below 450 °C . The saturated 2Pr value was 31.1 μC/cm2 . Such method is valuable for ferroelectric memories at 65 nm technology node and beyond because low temperature processes are required for the stability of interconnect material nickel silicide.

LINK:

http://dx.doi.org/10.1063/1.3204002

TITLE:

“Effects of Scaling the Thickness on the Ferroelectric Properties of SrBi2Ta2O9 Ultra Thin Film”, Jolanta Celinska, Vikram Joshi, Nararayan Solayappan, Larry McMillan, and Carlos Paz de Araujo, Applied Physics Letters 82, 3937 (2003)

ABSTRACT:

We have investigated the effect of reducing the thickness of strontium bismuth tantalite film to as low as 25 nm on its ferroelectric characteristics. A degradation of ferroelectric properties such as significant reduction in remanent polarization is generally observed with reduction in film thickness, in particular below 100 nm. This has been overcome by using a modified deposition process sequence and a crystallization technique based completely on the rapid thermal annealing process. The resulting ultrathin films show good remanent polarization, low-voltage saturation, low leakage current, high breakdown strength, and good endurance. These films demonstrate the potential for scaling and are excellent candidates for several generations of ferroelectric random access memory applications.

LINK:

http://dx.doi.org/10.1063/1.1579559

TITLE:

“Reduced thermal budget process for SBT thin film in planer type stack cell FeRAMs”, Junichi Karasawa, Yasuaki Hamada, Koji Ohashi, Eiji Natori, Koicji Oguchi, Tatsuja Shimoda, Vikram Joshi, Nararayan Solayappan, Myungho Lim, Jolanta Celinska, Larry McMillan, and Carlos Paz De Araujo, Integrated Ferroelectrics, 48, p 193-202, (2002)

ABSTRACT:

In order to reduce the thermal budget for SBT crystallization process in planer type stack cell FeRAMs, Rapid Thermal Anneal (RTA) based process for SBT thin film was investigated. Our new process is characterized by crystallization in RTA without any furnace annealing process, and includes a low temperature recovery annealing process (hereafter RTB (Reduced Thermal Budget) process). As a result of only 750°C RTA for accumulated time of 60s without furnace annealing process, the sufficient ferroelectric properties were derived in comparison with that of conventional SBT thin film. In the RTB process, two approaches to improve the break down voltage were carried out. First, we used UV exposure during the baking process. By optimizing the UV assisted baking process, a high break down field due to smooth surface morphology was successfully obtained, resulting in break down field of more than 1.2 MV/cm. Secondly, ultra thin SBT films as a top few layer on the base SBT thin film were employed. After optimization of the ultra thin SBT layer thickness, a very smooth SBT surface was successfully achieved, resulting in improvement of the break down field of more than 1.1 MV/cm.

LINK:

http://dx.doi.org/10.1080/10584580215452

TITLE:

“Low temperature process for strontium bismuth tantalate thin films”, Jolanta Celinska, Vikram Joshi, Narayan Solayappan, Larry McMillan, and Carlos De Paz Araujo, Integrated Ferroelectrics, 30, n 1-4, p 1-8, (2000)

ABSTRACT:

As CMOS dimensions shrink so does the limitation on total thermal budget for processing. For 0.18 μm design rules, the junction depth and the salicide process requirements limit the maximum processing temperature to below 700°C, preferably down to 650°C. For FeRAMs, this results in limitation on the thermal budget available for the crystallization of ferroelectric films. SBT and SBTN films have been generally annealed at 700°C or higher. Lowering the crystallization temperature down to 650°C requires the suppression of fluorite phase in order to obtain good ferroelectric performance. We have developed a CSD based low temperature process for SBT films yielding excellent ferroelectric properties. Several materials and process parameters have been optimized to suppress the fluorite phase. These include film stoichiometry and thickness, anneal ambient and ramp rates, UV energy and precursor solvents. In this paper we present a complete 650°C process for SBT thin films, highlighting process modifications and their effect on ferroelectric performance.

LINK:

http://dx.doi.org/10.1080/10584580008222247

TITLE:

“Sub-100 nm SBT Films For Low Voltage and High Density FeRAM Applications,” S. Narayan, V. Joshi, L.D. McMillan, and C.A. Paz de Araujo, “Sub-100 nm SBT Films For Low Voltage and High Density FeRAM Applications,” Integrated Ferroelectrics, 25, pp. 509-517, (1999).

ABSTRACT:

This paper discusses about the processing and electrical characteristics of sub-100 nm Strontium Bismuth Tantalate (SBT) films for low voltage and high-density FeRAM applications. Electrical data is reported for films as thin as 48-nm with polarization charge in the range of 13–15 μC/sq.cm. Saturation voltages of less than 1 V was measured with negligible fatigue and good leakage properties. The breakdown field was IMV/cm. The maximum processing temperature reported in this study is 700°C with optimized SBT stoichiometry and process conditions.

LINK:

http://dx.doi.org/10.1080/10584589908210169

TITLE:

“Structure and Device Characteristics of SrBi2Ta2O9 -Based Nonvolatile Random-Access Memories,” J. F. Scott, F. M. Ross, C. A. Paz de Araujo, M. C. Scott, and M. Huffman, “Structure and Device Characteristics of SrBi2Ta2O9 -Based Nonvolatile Random-Access Memories,” MRS Bulletin, Proceedings ISSCC, pp. 33-39, (1996)

ABSTRACT:

Recently there has been a paradigm shift in nonvolatile computer memories from silicon-technology-based EEPROMs (electrically erasable, programmable read-only memories) to devices in which the stored information is coded into + and − polarizations in thin-film ferroelectric capacitors. Such devices have read and erase/rewrite speeds of the order of 1–35 ns, many orders of magnitude faster than the erase/rewrite speeds of the best EEPROMs (Table I). However, fundamental questions concerning their lifetimes had delayed full commercialization. Because ferroelectrics normally have extremely large dielectric constants, their use as nonswitching capacitors in dynamic random-access memories (DRAMs) is also rapidly evolving. The majority of studies to date have emphasized lead zirconate titanate (PZT)-based capacitors for nonvolatile ferroelectric random-access memories (NVFRAMs) and barium strontium titanate-based capacitor DRAMs (see Table II).

LINK:

http://dx.doi.org/10.1557/S0883769400035892

TITLE:

“Fatigue-Free Ferroelectric Capacitors With Platinum Electrodes,” C.A. Paz de Araujo, J.D. Cuchiaro, L.D. McMillan, M.C. Scott, and J.F. Scott, “Fatigue-Free Ferroelectric Capacitors With Platinum Electrodes,” Nature, 374, pp. 627-629, (1995).

ABSTRACT:

A SIGNIFICANT fraction of the computer memory industry is at present involved in the manufacture of non-volatile memory devices1—that is, devices which retain information when power is interrupted. For such applications (and also for volatile memories), the use of capacitors constructed from ferroelectric thin films has stimulated much interest1. In such structures, information is stored in the polarization state of the ferroelectric material itself, which should in principle lead to lower power requirements, faster access time and potentially lower cost1. But the use of ferroelectrics is not without problems; the memories constructed to date have generally suffered from poor retention of stored information and degradation of performance ('fatigue') with use1–3. Here we describe the preparation and characterization of thin-film capacitors using ferroelectric materials from a large family of layered perovskite oxides, exemplified by SrBi2Ta2O9, SrBi2NbTaO9 and SrBi4Ta4O15. The structural flexibility of these materials allows their properties to be tailored so that many of the problems associated with previous ferroelectric memories are avoided. In particular, our capacitors do not show significant fatigue after 1012 switching cycles, and they exhibit good retention characteristics and low leakage currents even with films less than 100 nm thick.

LINK:

http://dx.doi.org/10.1038/374627a0